1. Field of the Invention
The present invention relates to a bridge that connects networks, in particular, to a synchronizing method and a bridge for synchronizing buses when they are connected.
2. Description of the Related Art
Audio units and video units have been digitized as with for example CD (Compact Disc) players, MD (Mini Disc) recorders/players, digital VCRs, digital cameras, and DVD (Digital Versatile Disc) players. As personal computers have become common, systems that connect such digital audio units or digital video units to personal computers have been proposed. As an interface that accomplishes a system that connects such digital audio units or such digital video units to a personal computer, IEEE (Institute of Electronics Engineers) 1394 is becoming attractive.
The IEEE 1394 interface supports both an isochronous transmission mode and an asynchronous transmission mode. The isochronous transmission mode is suitable for transmitting chronologically continuous data streams such as video data and audio data at high speed. The asynchronous transmission mode is suitable for transmitting various commands and files. Since the IEEE 1394 interface supports both the isochronous transmission mode and the asynchronous transmission mode, when the IEEE 1394 interface is used, video data and audio data can be transmitted between digital audio units and between digital video units, respectively. With a personal computer connected to such digital units through the IEEE 1394 interface, the user can easily control and edit video data and audio data.
The IEEE 1394 interface is a wired interface. To structure such a system with a wired interface, cable connections are required. In addition, such cable connections tend to become complicated. Moreover, with a wired interface, it is difficult to connect units that are disposed in different rooms.
Thus, the applicant of the present invention has proposed a wireless LAN (Local Area Network) that connects a digital audio unit or a digital video unit and a personal computer so as to wirelessly communicate therebetween. FIG. 7 shows an example of such a wireless LAN.
In FIG. 7, WN1, WN2, WN3, . . . are wireless nodes as communicating stations. Digital audio units or digital video units AV1, AV2, . . , such as a CD player, an MD recorder/player, a digital VCR, a digital camera, a DVD player, and a television receiver can be connected to the wireless nodes WN1, WN2, . . . In addition, a personal computer can be connected to the wireless nodes WN1, WN2, WN3, . . . Each of the digital audio units and digital video units AV1, AV2, . . . connected to the wireless nodes WN1, WN2, . . . has the IEEE 1394 digital interface. The wireless nodes WN1, WN2, . . . and the digital audio units and digital video units AV1, AV2, . . . are connected with the IEEE 1394 digital interface.
WNB is a wireless node as a controlling station. The wireless node WNB as the controlling station exchanges control data with the wireless nodes WN1, WN2, . . . as the communicating stations. The wireless nodes WN1, WN2, . . . as the communicating stations communicate each other under the control of the wireless node WNB as the controlling station. The wireless nodes WN1, WN2, . . . as the communicating stations wirelessly exchange chronologically continuous data streams (isochronous data) and asynchronous data such as commands.
It can be considered that a system that wirelessly transmits IEEE 1394 digital data is a system of which buses are connected with a bridge.
The bridge matches a physical layer and a link layer on one bus side with those on another bus side, performs a routing process for nodes that communicate data with each other, and exchanges data through a transmission path. FIG. 8 is a functional block diagram showing the structure of such a bridge. Referring to FIG. 8, the bridge comprises a physical layer portion 111, a link layer portion 112, a physical layer portion 117, a link layer portion 116, a routing portion 113, a routing portion 115, and a data exchanging portion 114. The physical layer portion 111 matches a physical layer of a first bus 101 with that of a second bus 102. The link layer portion 112 matches a link layer of the first bus 101 with that of the second bus 102. The physical layer portion 117 matches the physical layer of the second bus 102 with that of the first bus 101. The link layer portion 116 matches the link layer of the second bus 102 with that of the first bus 101. The routing portion 113 routes data of the first bus 101 to the second bus 102. The routing portion 115 routes data of the second bus 102 to the first bus 101. The data exchanging portion 114 exchanges data between the first bus 101 and the second bus 102.
In a wireless LAN, as shown in FIG. 9, data is wirelessly communicated between a wireless node WNn and a wireless node WNk. At this point, an IEEE 1394 bus BUSn connected to the wireless node WNn corresponds to the first bus. An IEEE 1394 bus BUSk connected to the wireless node WNk corresponds to the second bus. Data is communicated between the wireless node WNn and the wireless node WNk. The wireless node WNn has the physical layer portion 111, the link layer portion 112, and the routing portion 113. The wireless node WNk has the physical layer portion 117, the link layer portion 116, and the routing portion 115. The transmission path of the exchanging portion 114 is a wireless transmission path.
Thus, as described above, it can be considered that a system that wirelessly transmits IEEE 1394 data is a system of which IEEE 1394 buses are connected with a bridge.
IEEE 1394 data is transmitted frame by frame. The IEEE 1394 data contains a time stamp. When buses that transmit data with a time stamp are connected with a bridge, cycle time counters of the buses are synchronized so as to constantly transmit data. In addition, the time stamp is changed so as to compensate the process time of the bridge.
As shown in FIG. 10, in the IEEE 1394 data, one frame is composed of 125 μm. Corresponding to the cycle start packet information transmitted frame by frame and the deviations of the counter values, the counters are synchronized.
The cycle time counter is composed of a first counter, a second counter, and a third counter. The first counter counts frame intervals at 24.57 MHz. The second counter counts lines at frame intervals. The third counter counts seconds. The bit length of the cycle time counter is 32 bits.
FIG. 11 is a block diagram showing an example of the structure of a conventional synchronizing circuit that synchronizes cycle time counters of a first bus and a second bus. In FIG. 11, reference numeral 201 is a first bus side cycle time counter. Reference numeral 204 is a second bus side cycle time counter.
A counter value of the first bus side cycle time counter 201 is supplied to a subtracting circuit 202. A counter value of the second bus side cycle time counter 204 is supplied to the subtracting circuit 202. The subtracting circuit 202 subtracts the counter value of the cycle time counter 204 from the counter value of the cycle time counter 201.
An output value of the subtracting circuit 202 is supplied to a synchronous controlling circuit 203. The synchronous controlling circuit 203 outputs a deviation control signal corresponding to the output value of the subtracting circuit 202. The deviation control signal is supplied to the cycle time counter 204. The cycle time counter 204 is controlled corresponding to the deviation control signal.
When two buses are connected, the counter value of the cycle time counter 201 is different from the counter value of the cycle time counter 204. Thus, the counter value of the cycle time counter 201 should be synchronized with the counter value of the cycle time counter 204.
Thus, when the buses are connected with the bridge, the counter value of the cycle time counter 204 is initialized with the counter value of the cycle time counter 201. Consequently, the counter value of the cycle time counter 201 is matched with the counter value of the cycle time counter 204. In other words, after the counter value of the cycle time counter 204 is initialized with the counter value of the cycle time counter 201 and then the counter value of the cycle time counter 201 is matched with the counter value of the cycle time counter 204, the synchronous controlling circuit 303 controls the counter value of the cycle time counter 204 corresponding to the resultant value of which the counter value of the cycle time counter 201 is subtracted from the counter value of the cycle time counter 204.
However, when the counter value of the cycle time counter 204 is initialized with the counter value of the cycle time counter 201, since the counter value of the cycle time counter 204 is discontinuously changed, data transmission should be instantaneously stopped.
To prevent the data transmission from being instantaneously suspended, the counter value of the cycle time counter 204 may be gradually matched with the counter value of the cycle time counter 201. However, since the bit length of each of the cycle time counters is 32 bits, a long adjustment time period is required.